Design and Verification of Clock Domain Crossing Interfaces

The clock distribution network is an essential component in every synchronous digital system. The design of this network is becoming an increasingly sophisticated and difficult task due to the increasing logic capacity of chips and due to the fact that this network has to reach out to each and every memory element in the chip. Multiclock domain circuits with Clock Domain Crossing (CDC) interfaces are emerging as an alternative to circuits with a global clock. The design of CDC interfaces is a challenging task due to the difficulty of dealing with two possibly unrelated clock domains and the possibility of propagating metastability into the communicating blocks making CDC interfaces difficult to design and verify. In this work, we present a hybrid FIFO-asynchronous method for constructing robust CDC interfaces. This method avoids the shortcomings of previous interfaces and provides reliable transfer of data and control signals between different clock domains. A complete design is proposed, fully implemented using 90nm TSMC CMOS technology, and simulated using SPICE. Extensive simulations confirmed the robustness of the interface at different temperatures, different workloads, and varying frequency ratios. The reported implementation provides a maximum throughput of 606 Mitems/s. Moreover, we also address the challenging task of the verification of CDC interfaces. Most RTL simulation tools available today are incapable of simulating these interfaces. In this thesis, we present a framework for the formal verification of CDC interfaces. The framework explicitly models metastability by taking advantage of the unique features of probabilistic model checking. The framework is applied to common CDC interfaces by verifying them using the PRISM model checker

Design and scheduling of effcient real-time embedded systems

Computer systems have gone through tremendous changes in the past fewdecades. Relatively large general purpose computers dominated the early daysof computers. With time, demand increased for smaller, more dedicated computersystems, called embedded systems. These systems perform a specificset of functions interacting with the physical environment, often in real-time.Real-time embedded systems are found today in many application domainssuch as the automotive domain, avionics, and control systems. Real-time systemsdiffer from traditional computer systems in their dependence on time asa correctness criteria, i.e., a late correct answer is useless for these systems.Embedded real-time systems today are more integrated, more parallel, andmore complex than ever before. In this thesis, we discuss limitations thataffect the applicability of real-time models, analysis methods, and schedulingapproaches to the realities of today's embedded systems and propose solutionsto address these challenges. We first look into the issue of shared resources and its effect on the mapping and scheduling of software tasks in a real-time system. Most task mappingapproaches proposed in the literature perform task mapping assuming independenttasks that do not share resources. Managing shared resources andtheir protection mechanisms is performed later. However, this approach mightrequire several rounds of iteration and can lead to inefficient results. In thisthesis, we explore the possibility of using different resource protection mechanismswithin a single system, and propose to tackle the design problem moreefficiently by jointly performing task allocation, scheduling, and resource protection mechanism selection. Two approaches are presented to solve this optimizationproblem: an optimal Mixed Integer Linear Programming (MILP)approach and an efficient heuristic. The proposed work is shown to significantly improve system schedulability. Experimental results indicate that theminimum utilization at which at least 95% of systems become scheulable canbe improved from 65%-70% for the best published task allocation algorithmsto 76%-85% using our heuristic with minimal memory cost. Even better resultscan be achieved using the MILP approach.Next, we look into the design of systems composed of components thathave different levels of criticality. Mixed-Criticality Systems (MCS) receivedmuch attention recently to due their industrial relevance. We focus on threechallenges in MCS design: task allocation, fault-tolerance, and model-baseddesign. For task allocation, we show that traditional task allocation algorithmscan be inefficient in a mixed-criticality context, and propose an alternative thatwe call dual-partitioned task allocation. Experiments show that for systemsthat have a utilization of 80% or higher, we can schedule 17% more systemson a given multicore platform using the dual-partitioned approach. Fault-tolerance is an important issue for MCS since these systems containa safety critical part. To design MCS that tolerate hardware transient faults,we propose a new mixed-criticality model that simultaneously addresses criticality,reliability, and Quality of Service (QoS). A schedulability test for thenew model is derived. Furthermore, to allow designers to incorporate the newmodel and analysis in their design process, we propose a design space explorationframework based on the new model that supports various fault-tolerancemechanisms. QoS improvements of up to 42.9% can be achieved using the newmodel compared to the traditional MCS model extended to support transientfaults.For model-based design, we propose algorithms to generate optimized semantic-preserving implementationsfor MCS specified using the SR model, with minimal functional delay addition.An optimal Branch-and-Bound based algorithm and an efficient heuristicare proposed for this purpose.Les systemes informatiques ont subi des changements enormes au cours des dernieres decennies. Dans leurs debuts, les ordinateurs, de grande taille et a usage general, etaient dominants. Avec le temps, la demande pour des systemes informatiques plus petits et dedies pour des taches plus specifique, appeles systemes embarques, a augmente. Ces systemes executent un ensemble de fonctions specifique interagissant avec l'environnement physique, souvent en temps reel. Les systemes embarques temps-reel se trouvent aujourd'hui dans de nombreux domaines d'application tels que l'automobile, l'avionique et les systemes de controle. Les systemes temps-reel different des systemes informatiques traditionnels dans leur dependence au temps qui est utilise comme critere de correction. C'est-a-dire qu'une reponse correcte tardive est inutile pour ces systemes. Les systemes embarques temps-reel sont aujourd'hui plus integres, plus paralleles et plus complexes que jamais. Dans cette these, nous discutons des limites qui affectent l'applicabilite des modeles temps-reel, des methodes d'analyse et des approches d'ordonnancement aux realites des systemes embarques d'aujourd'hui et nous proposons des solutions pour relever ces defis. En premier lieu, nous examinons la question des ressources partagees et leurs effets sur la cartographie et l'ordonnancement des taches logicielles dans un systeme temps-reel. La plupart des approches de cartographie des taches proposees dans la litterature effectuent la cartographie des taches en assumant des taches independantes qui ne partagent pas les ressources. La gestion des ressources partagees ainsi que leurs mecanismes de protection sont effectues plus tard. Cependant, cette approche peut necessiter plusieurs cycles d'iteration et peut mener a des resultats inefficaces. Dans cette these, nous explorons la possibilite d'utiliser differnents mecanismes de protection des ressources au sein d'un meme systeme et proposons d'aborder plus efficacement le probleme de conception en executant conjointement l'attribution des taches, l'ordonnancement et la selection des mecanismes de protection des ressources. Deux approches sont presentees pour resoudre ce probleme d'optimisation: une approche doptimisation lineaire a nombres entiers mixtes optimale (MILP) etune heuristique efficace. Le travail propose permet d'ameliorer considerablement lordonnancabilite du systeme. Les resultats experimentaux indiquent que l'utilisation minimale a laquelle au moins 95% des systemes deviennent ordonnancables peut etre amelioree de 65%-70%, dans les meilleurs algorithmes d'allocation de tache publies, a 76%-85% en utilisant notre heuristique avec un cot memoire minime. Des resultats encore meilleurs peuvent etre obtenus en utilisant l'approche MILP. Ensuite, nous examinons la conception de systemes formes de composants qui ont differents niveaux de criticite. Nous nous concentrons sur trois defis en matiere de conception MCS: l attribution des taches, la tolerance aux pannes et la conception basee sur modele. Pour l'attribution des taches, nous proposons l'allocation detaches a double partition. Les experiences montrent que pour les systemes dont l'utilisation est superieure ou egale a 80%, qu'on peut ordonnancer 17% de systemes sur une plate-forme multicur donnee en utilisant l'approche a deux partitions. Pour concevoir des MCS qui tolerent les defauts transitoires, nous proposons un nouveau modele de criticite mixte qui aborde simultanement la criticite, la abilite et la qualite de service (QoS). Nous proposons un cadre d'exploration d'espace de conception base sur le nouveau modele qui prend encharge divers mecanismes de tolerance de pannes. Des ameliorations de la qualite de service jusqu'a 42.9% peuvent être obtenues

Partitioning and Selection of Data Consistency Mechanisms for Multicore Real-Time Systems

Multicore platforms are becoming increasingly popular in real-time systems. One of the major challenges in designing multicore real-time systems is ensuring consistent and timely access to shared resources. Lock-based protection mechanisms such as MPCP and MSRP have been proposed to guarantee mutually exclusive access in multicore systems at the expense of blocking. In this article, we consider partitioning and scheduling in multicore real-time systems with resource sharing. We first propose a resource-aware task partitioning algorithm for systems with lock-based protection. Wait-free methods, which ensure consistent access to shared memory resources with negligible blocking at the expense of additional memory space, are a suitable alternative when the shared resource is a communication buffer. We propose several approaches to solve the joint problem of task partitioning and the selection of a data consistency mechanism (lock-based or wait-free). The problem is first formulated as an Integer Linear Programming (ILP). For large systems where an ILP solution is not scalable, we propose two heuristic algorithms. Experimental results compare the effectiveness of the proposed approaches in finding schedulable systems with low memory cost and show how the use of wait-free methods can significantly improve schedulability

HIV is associated with endothelial activation despite ART, in a sub-Saharan African setting

Objective To study the relationship between endothelial dysfunction, HIV infection, and stroke in Malawians. Methods Using a cross-sectional design, we measured plasma levels of intercellular adhesion molecule-1 (ICAM-1), plasminogen activator inhibitor-1 (PAI-1), vascular endothelial growth factor (VEGF), and soluble thrombomodulin (sTM) in stroke patients and controls, stratified by HIV status. These biomarkers were measured using ELISA. After dichotomization, each biomarker was used as the dependent variable in a multivariable logistic regression model. Primary independent variables included HIV and stroke status. Adjustment variables were age, sex, hypertension, diabetes mellitus, tobacco and alcohol consumption, personal/family history of stroke, antiretroviral therapy status, and hypercholesterolemia. Results Sixty-one stroke cases (19 HIV+) and 168 controls (32 HIV+) were enrolled. The median age was 55 years (38.5-65.0) for controls and 52 years (38.0-73.0) for cases ( = 0.38). The median CD4 T-cell count was 260.1 cells/mm (156.3-363.9) and 452 cells/mm (378.1-527.4) in HIV-infected cases and controls, respectively. HIV infection was independently associated with high levels of ICAM-1 (OR = 3.6, 95% CI: 1.3-10.6, = 0.018) in controls but not in stroke cases even after excluding patients with a viral load >1,000 RNA copies/mL (OR = 4.1, 95% CI: 1.3-13.1, = 0.017). There was no association between the clinical profiles of HIV-positive controls or HIV-positive stroke and high levels of PAI-1, VEGF, and sTM. Conclusions HIV infection is associated with endothelial activation despite antiretroviral treatment. Our findings underscore the need for larger clinical cohorts to better understand the contribution of this perturbation of the endothelial function to the increasing burden of cardiovascular diseases in sub-Saharan Africa